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emit_tests.rs
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13396 lines (13319 loc) · 338 KB
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use crate::ir::{MemFlags, TrapCode};
use crate::isa::s390x::inst::*;
use crate::isa::s390x::settings as s390x_settings;
use crate::settings;
use alloc::vec::Vec;
use smallvec::smallvec;
#[cfg(test)]
fn simm20_zero() -> SImm20 {
SImm20::maybe_from_i64(0).unwrap()
}
#[test]
fn test_s390x_binemit() {
let mut insns = Vec::<(Inst, &str, &str)>::new();
insns.push((Inst::Nop0, "", "nop-zero-len"));
insns.push((Inst::Nop2, "0707", "nop"));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Add32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9F83012",
"ark %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Add64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9E86045",
"agrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::AddLogical32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9FA3012",
"alrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::AddLogical64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9EA6045",
"algrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Sub32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9F93012",
"srk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Sub64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9E96045",
"sgrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::SubLogical32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9FB3012",
"slrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::SubLogical64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9EB6045",
"slgrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Mul32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9FD3012",
"msrkc %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Mul64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9ED6045",
"msgrkc %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::And32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9F43012",
"nrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::And64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9E46045",
"ngrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Orr32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9F63012",
"ork %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Orr64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9E66045",
"ogrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Xor32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9F73012",
"xrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::Xor64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9E76045",
"xgrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::NotAnd32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9743012",
"nnrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::NotAnd64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9646045",
"nngrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::NotOrr32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9763012",
"nork %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::NotOrr64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9666045",
"nogrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::NotXor32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9773012",
"nxrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::NotXor64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9676045",
"nxgrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::AndNot32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9F53012",
"ncrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::AndNot64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9E56045",
"ncgrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::OrrNot32,
rd: writable_gpr(1),
rn: gpr(2),
rm: gpr(3),
},
"B9753012",
"ocrk %r1, %r2, %r3",
));
insns.push((
Inst::AluRRR {
alu_op: ALUOp::OrrNot64,
rd: writable_gpr(4),
rn: gpr(5),
rm: gpr(6),
},
"B9656045",
"ocgrk %r4, %r5, %r6",
));
insns.push((
Inst::AluRRSImm16 {
alu_op: ALUOp::Add32,
rd: writable_gpr(4),
rn: gpr(5),
imm: -32768,
},
"EC45800000D8",
"ahik %r4, %r5, -32768",
));
insns.push((
Inst::AluRRSImm16 {
alu_op: ALUOp::Add32,
rd: writable_gpr(4),
rn: gpr(5),
imm: 32767,
},
"EC457FFF00D8",
"ahik %r4, %r5, 32767",
));
insns.push((
Inst::AluRRSImm16 {
alu_op: ALUOp::Add64,
rd: writable_gpr(4),
rn: gpr(5),
imm: -32768,
},
"EC45800000D9",
"aghik %r4, %r5, -32768",
));
insns.push((
Inst::AluRRSImm16 {
alu_op: ALUOp::Add64,
rd: writable_gpr(4),
rn: gpr(5),
imm: 32767,
},
"EC457FFF00D9",
"aghik %r4, %r5, 32767",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Add32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"1A12",
"ar %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Add64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B9080045",
"agr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Add64Ext32,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B9180045",
"agfr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::AddLogical32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"1E12",
"alr %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::AddLogical64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B90A0045",
"algr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::AddLogical64Ext32,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B91A0045",
"algfr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Sub32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"1B12",
"sr %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Sub64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B9090045",
"sgr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Sub64Ext32,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B9190045",
"sgfr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::SubLogical32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"1F12",
"slr %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::SubLogical64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B90B0045",
"slgr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::SubLogical64Ext32,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B91B0045",
"slgfr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Mul32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"B2520012",
"msr %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Mul64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B90C0045",
"msgr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Mul64Ext32,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B91C0045",
"msgfr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::And32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"1412",
"nr %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::And64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B9800045",
"ngr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Orr32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"1612",
"or %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Orr64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B9810045",
"ogr %r4, %r5",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Xor32,
rd: writable_gpr(1),
ri: gpr(1),
rm: gpr(2),
},
"1712",
"xr %r1, %r2",
));
insns.push((
Inst::AluRR {
alu_op: ALUOp::Xor64,
rd: writable_gpr(4),
ri: gpr(4),
rm: gpr(5),
},
"B9820045",
"xgr %r4, %r5",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Add32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"5A102000",
"a %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Add32Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"4A102000",
"ah %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Add32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E3102000005A",
"ay %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Add32Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E3102000007A",
"ahy %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Add64,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E31020000008",
"ag %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Add64Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E31020000038",
"agh %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Add64Ext32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E31020000018",
"agf %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::AddLogical32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"5E102000",
"al %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::AddLogical32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E3102000005E",
"aly %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::AddLogical64,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E3102000000A",
"alg %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::AddLogical64Ext32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E3102000001A",
"algf %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Sub32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"5B102000",
"s %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Sub32Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"4B102000",
"sh %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Sub32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E3102000005B",
"sy %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Sub32Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E3102000007B",
"shy %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Sub64,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E31020000009",
"sg %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Sub64Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E31020000039",
"sgh %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Sub64Ext32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E31020000019",
"sgf %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::SubLogical32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"5F102000",
"sl %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::SubLogical32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E3102000005F",
"sly %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::SubLogical64,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E3102000000B",
"slg %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::SubLogical64Ext32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E3102000001B",
"slgf %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Mul32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"71102000",
"ms %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Mul32Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"4C102000",
"mh %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Mul32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E31020000051",
"msy %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Mul32Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E3102000007C",
"mhy %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Mul64,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E3102000000C",
"msg %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Mul64Ext16,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E3102000003C",
"mgh %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::Mul64Ext32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"E3102000001C",
"msgf %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::And32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD12 {
base: gpr(2),
index: zero_reg(),
disp: UImm12::zero(),
flags: MemFlags::trusted(),
},
},
"54102000",
"n %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::And32,
rd: writable_gpr(1),
ri: gpr(1),
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
"E31020000054",
"ny %r1, 0(%r2)",
));
insns.push((
Inst::AluRX {
alu_op: ALUOp::And64,