WB_Mux_Selection_Unit.v.bak

// msrv32_wb_mux_sel_unit 21BCE0289
module msrv32_wb_mux_sel_unit(
	input alu_src_reg_in,
	input [2:0] wb_mux_sel_reg_in,
	input [31:0] alu_result_in,
	input [31:0] lu_output_in,
	input [31:0] imm_reg_in,
	input [31:0] iadder_out_reg_in,
	input [31:0] csr_data_in,
	input [31:0] pc_plus_4_reg_in,
	input [31:0] rs2_reg_in,
	output [31:0] wb_mux_out,
	output [31:0] alu_2nd_src_mux_out
);
	parameter WB_ALU = 3'b000,
		WB_LU = 3'b001,
		WB_IMM = 3'b010,
		WB_IADDER_OUT = 3'b011,
		WB_CSR = 3'b100,
		WB_PC_PLUS = 3'b101;

	reg [31:0] wb_res;
	reg [31:0] alu_2nd_src_res;

	always@(*) begin
		alu_2nd_src_res = (alu_src_reg_in) ? rs2_reg_in : imm_reg_in;
		case(wb_mux_sel_reg_in)
			WB_ALU: wb_res = alu_result_in;
			WB_LU: wb_res = lu_output_in;
			WB_IMM: wb_res = imm_reg_in;
			WB_IADDER_OUT: wb_res = iadder_out_reg_in;
			WB_CSR: wb_res = csr_data_in;
			WB_PC_PLUS: wb_res = pc_plus_4_reg_in;
			default: wb_res = alu_result_in;
		endcase
	end

	assign wb_mux_out = wb_res;
	assign alu_2nd_src_mux_out = alu_2nd_src_res;
endmodule