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Restore proper aspect ratio
1 parent e24cf01 commit 8bacca8

5 files changed

Lines changed: 28 additions & 18 deletions

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dist/Cores/agg23.NES/core.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
"description": "Nintendo Entertainment System and Famicom. Nintendo's first home console",
88
"author": "agg23",
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"url": "https://github.com/agg23/openFPGA-NES",
10-
"version": "0.1.0",
10+
"version": "0.1.1",
1111
"date_release": "2022-09-26"
1212
},
1313
"framework": {

dist/Cores/agg23.NES/video.json

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,16 @@
55
{
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"width": 256,
77
"height": 240,
8-
"aspect_w": 4,
9-
"aspect_h": 3,
8+
"aspect_w": 128,
9+
"aspect_h": 105,
10+
"rotation": 0,
11+
"mirror": 0
12+
},
13+
{
14+
"width": 256,
15+
"height": 224,
16+
"aspect_w": 64,
17+
"aspect_h": 49,
1018
"rotation": 0,
1119
"mirror": 0
1220
}

src/fpga/apf/build_id.mif

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ CONTENT
1010
BEGIN
1111

1212
0E0 : 20220926;
13-
0E1 : 00070732;
14-
0E2 : 4a64c356;
13+
0E1 : 00130701;
14+
0E2 : c4e2c76a;
1515

1616
END;

src/fpga/core/core_top.v

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -709,9 +709,11 @@ module core_top (
709709
reg hs_prev;
710710
reg [2:0] hs_delay;
711711
reg vs_prev;
712+
reg de_prev;
712713

713714
wire de = ~(h_blank || v_blank);
714715
// TODO: Add PAL
716+
wire [23:0] video_slot_rgb = {10'b0, hide_overscan, 10'b0, 3'b0};
715717

716718
always @(posedge clk_video_5_37) begin
717719
video_hs_reg <= 0;
@@ -722,6 +724,8 @@ module core_top (
722724
video_de_reg <= 1;
723725

724726
video_rgb_reg <= video_rgb_nes;
727+
end else if (de_prev && ~de) begin
728+
video_rgb_reg <= video_slot_rgb;
725729
end
726730

727731
if (hs_delay > 0) begin
@@ -741,6 +745,7 @@ module core_top (
741745
video_vs_reg <= ~vs_prev && video_vs_nes;
742746
hs_prev <= video_hs_nes;
743747
vs_prev <= video_vs_nes;
748+
de_prev <= de;
744749
end
745750

746751
// Sound

src/fpga/core/rtl/video.sv

Lines changed: 10 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -180,8 +180,13 @@ always @(posedge clk) begin
180180
// number of 224 pixels, so we take off a proportional percentage from the sides to compensate.
181181

182182
if(pix_ce) begin
183-
hblank <= (hc >= HBL_START) && (hc <= HBL_END); // 280 pixels
184-
vblank <= (vc >= VBL_START); // 240 lines
183+
if(hide_overscan) begin
184+
hblank <= (hc >= HBL_START && hc <= HBL_END); // 280 - ((224/240) * 16) = 261.3
185+
vblank <= (vc > (VBL_START - 9)) || (vc < 8); // 240 - 16 = 224
186+
end else begin
187+
hblank <= (hc >= HBL_START) && (hc <= HBL_END); // 280 pixels
188+
vblank <= (vc >= VBL_START); // 240 lines
189+
end
185190

186191
if(hc == 279) begin
187192
HSync <= 1;
@@ -205,20 +210,12 @@ wire [7:0] ri = pixel[23:16];
205210
wire [7:0] gi = pixel[15:8];
206211
wire [7:0] bi = pixel[7:0];
207212

208-
wire in_overscan = hide_overscan ? (vc <= VBL_START && vc > VBL_START - 9) || vc < 8 : 0;
209-
210213
reg [7:0] ro,go,bo;
211214
always @(posedge clk) if (pix_ce_n) begin
212215
reg [2:0] emph;
213-
if (in_overscan) begin
214-
ro <= 0;
215-
go <= 0;
216-
bo <= 0;
217-
end else begin
218-
ro <= ri;
219-
go <= gi;
220-
bo <= bi;
221-
end
216+
ro <= ri;
217+
go <= gi;
218+
bo <= bi;
222219
emph <= 0;
223220
if (~&color_ef[3:1]) begin // Only applies in draw range
224221
emph <= emphasis;

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