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Fewer clippy warnings about casts
1 parent d978242 commit 09db91f

1 file changed

Lines changed: 20 additions & 14 deletions

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crates/wasmtime/src/runtime/vm/interpreter.rs

Lines changed: 20 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -141,13 +141,11 @@ impl InterpreterRef<'_> {
141141
};
142142

143143
if cfg!(debug_assertions) {
144-
for (i, val) in setjmp.xregs.iter().enumerate() {
145-
assert!(self.0[XReg::new(i as u8 + 16).unwrap()].get_u64() == *val);
144+
for (i, reg) in callee_save_xregs() {
145+
assert!(self.0[reg].get_u64() == setjmp.xregs[i]);
146146
}
147-
for (i, val) in setjmp.fregs.iter().enumerate() {
148-
assert!(
149-
self.0[FReg::new(i as u8 + 16).unwrap()].get_f64().to_bits() == val.to_bits()
150-
);
147+
for (i, reg) in callee_save_fregs() {
148+
assert!(self.0[reg].get_f64().to_bits() == setjmp.fregs[i].to_bits());
151149
}
152150
assert!(self.0.fp() == setjmp.fp);
153151
assert!(self.0.lr() == setjmp.lr);
@@ -198,11 +196,11 @@ impl InterpreterRef<'_> {
198196
fn setjmp(&self) -> Setjmp {
199197
let mut xregs = [0; 16];
200198
let mut fregs = [0.0; 16];
201-
for (i, slot) in xregs.iter_mut().enumerate() {
202-
*slot = self.0[XReg::new(i as u8 + 16).unwrap()].get_u64();
199+
for (i, reg) in callee_save_xregs() {
200+
xregs[i] = self.0[reg].get_u64();
203201
}
204-
for (i, slot) in fregs.iter_mut().enumerate() {
205-
*slot = self.0[FReg::new(i as u8 + 16).unwrap()].get_f64();
202+
for (i, reg) in callee_save_fregs() {
203+
fregs[i] = self.0[reg].get_f64();
206204
}
207205
Setjmp {
208206
xregs,
@@ -222,11 +220,11 @@ impl InterpreterRef<'_> {
222220
lr,
223221
} = setjmp;
224222
unsafe {
225-
for (i, val) in xregs.into_iter().enumerate() {
226-
self.0[XReg::new(i as u8 + 16).unwrap()].set_u64(val);
223+
for (i, reg) in callee_save_xregs() {
224+
self.0[reg].set_u64(xregs[i]);
227225
}
228-
for (i, val) in fregs.into_iter().enumerate() {
229-
self.0[FReg::new(i as u8 + 16).unwrap()].set_f64(val);
226+
for (i, reg) in callee_save_fregs() {
227+
self.0[reg].set_f64(fregs[i]);
230228
}
231229
self.0.set_fp(fp);
232230
self.0.set_lr(lr);
@@ -397,3 +395,11 @@ impl InterpreterRef<'_> {
397395
unreachable!()
398396
}
399397
}
398+
399+
fn callee_save_xregs() -> impl Iterator<Item = (usize, XReg)> {
400+
(0..16).map(|i| (i.into(), XReg::new(i + 16).unwrap()))
401+
}
402+
403+
fn callee_save_fregs() -> impl Iterator<Item = (usize, FReg)> {
404+
(0..16).map(|i| (i.into(), FReg::new(i + 16).unwrap()))
405+
}

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