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ISLE rule cleanups (#5389)
* cranelift-codegen: Use ISLE matching, not same_value The `same_value` function just wrapped an equality test into an external constructor, but we can do that with ISLE's equality constraints instead. * riscv64: Remove custom condition-code tests The `lower_icmp` term exists solely to decide whether to sign-extend or zero-extend the comparison operands, based on whether the condition code requires a signed comparison. It additionally tested whether the condition code was == or !=, but produced the same result as for other unsigned comparisons. We already have `signed_cond_code` in the ISLE prelude, which classifies the total-ordering condition codes according to whether they're signed. It also lumps == and != in the "unsigned" camp, as desired. So this commit uses the existing method from the prelude instead of riscv64-local definitions. Because this version has no constraints on the left-hand side of the rule in the unsigned case, ISLE generates Rust that always returns `Some`. That shows that the current use of `unwrap` is justified, at the only Rust-side call-site of `constructor_lower_icmp`, which is in cranelift/codegen/src/isa/riscv64/lower/isle.rs. * ISLE prelude: make offset32 infallible This extractor always returns `Some`, so it doesn't need to be fallible.
1 parent 0eb2242 commit 29b23d4

7 files changed

Lines changed: 15 additions & 71 deletions

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cranelift/codegen/src/isa/aarch64/lower.isle

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -189,21 +189,17 @@
189189

190190
;;;; Rules for `iadd_pairwise` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
191191

192-
(rule (lower (has_type $I16X8 (iadd_pairwise (swiden_low x) (swiden_high y))))
193-
(if-let z (same_value x y))
194-
(saddlp8 z))
192+
(rule (lower (has_type $I16X8 (iadd_pairwise (swiden_low x) (swiden_high x))))
193+
(saddlp8 x))
195194

196-
(rule (lower (has_type $I32X4 (iadd_pairwise (swiden_low x) (swiden_high y))))
197-
(if-let z (same_value x y))
198-
(saddlp16 z))
195+
(rule (lower (has_type $I32X4 (iadd_pairwise (swiden_low x) (swiden_high x))))
196+
(saddlp16 x))
199197

200-
(rule (lower (has_type $I16X8 (iadd_pairwise (uwiden_low x) (uwiden_high y))))
201-
(if-let z (same_value x y))
202-
(uaddlp8 z))
198+
(rule (lower (has_type $I16X8 (iadd_pairwise (uwiden_low x) (uwiden_high x))))
199+
(uaddlp8 x))
203200

204-
(rule (lower (has_type $I32X4 (iadd_pairwise (uwiden_low x) (uwiden_high y))))
205-
(if-let z (same_value x y))
206-
(uaddlp16 z))
201+
(rule (lower (has_type $I32X4 (iadd_pairwise (uwiden_low x) (uwiden_high x))))
202+
(uaddlp16 x))
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208204
(rule -1 (lower (has_type ty (iadd_pairwise x y)))
209205
(addp x y (vector_size ty)))

cranelift/codegen/src/isa/riscv64/inst.isle

Lines changed: 4 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1766,29 +1766,13 @@
17661766
(value_regs_get x 0))
17671767
(convert ValueRegs Reg convert_valueregs_reg)
17681768

1769-
;;; intcc is not equal nor ne.
1770-
;;; intcc is >= <= ...
1771-
;;; return alongside with if signed.
1772-
(decl intcc_is_gt_etc (IntCC bool) IntCC)
1773-
(extern extractor intcc_is_gt_etc intcc_is_gt_etc)
1774-
1775-
(decl intcc_is_eq_or_ne (IntCC) IntCC)
1776-
(extern extractor intcc_is_eq_or_ne intcc_is_eq_or_ne)
1777-
17781769
;;; lower icmp
17791770
(decl lower_icmp (IntCC ValueRegs ValueRegs Type) Reg)
1780-
;;; eq or ne.
1781-
(rule -1
1782-
(lower_icmp (intcc_is_eq_or_ne cc) x y ty)
1783-
(gen_icmp cc (ext_int_if_need $false x ty) (ext_int_if_need $false y ty) ty))
1784-
;;;; singed >= ...
1785-
(rule
1786-
(lower_icmp (intcc_is_gt_etc cc $true) x y ty)
1771+
(rule 1 (lower_icmp cc x y ty)
1772+
(if (signed_cond_code cc))
17871773
(gen_icmp cc (ext_int_if_need $true x ty) (ext_int_if_need $true y ty) ty))
1788-
;;;; unsigned >= ...
1789-
(rule
1790-
(lower_icmp (intcc_is_gt_etc cc $false) x y ty)
1791-
(gen_icmp cc (ext_int_if_need $false x ty ) (ext_int_if_need $false y ty) ty))
1774+
(rule (lower_icmp cc x y ty)
1775+
(gen_icmp cc (ext_int_if_need $false x ty) (ext_int_if_need $false y ty) ty))
17921776

17931777
(decl lower_icmp_over_flow (ValueRegs ValueRegs Type) Reg)
17941778

cranelift/codegen/src/isa/riscv64/lower/isle.rs

Lines changed: 0 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -406,29 +406,6 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, Flags, IsaFlags, 6>
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tmp.to_reg()
407407
}
408408

409-
fn intcc_is_gt_etc(&mut self, cc: &IntCC) -> Option<(IntCC, bool)> {
410-
let cc = *cc;
411-
match cc {
412-
IntCC::SignedLessThan => Some((cc, true)),
413-
IntCC::SignedGreaterThanOrEqual => Some((cc, true)),
414-
IntCC::SignedGreaterThan => Some((cc, true)),
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IntCC::SignedLessThanOrEqual => Some((cc, true)),
416-
//
417-
IntCC::UnsignedLessThan => Some((cc, false)),
418-
IntCC::UnsignedGreaterThanOrEqual => Some((cc, false)),
419-
IntCC::UnsignedGreaterThan => Some((cc, false)),
420-
IntCC::UnsignedLessThanOrEqual => Some((cc, false)),
421-
_ => None,
422-
}
423-
}
424-
fn intcc_is_eq_or_ne(&mut self, cc: &IntCC) -> Option<IntCC> {
425-
let cc = *cc;
426-
if cc == IntCC::Equal || cc == IntCC::NotEqual {
427-
Some(cc)
428-
} else {
429-
None
430-
}
431-
}
432409
fn lower_br_table(&mut self, index: Reg, targets: &VecMachLabel) -> InstOutput {
433410
let tmp1 = self.temp_writable_reg(I64);
434411
let targets: Vec<BranchTarget> = targets

cranelift/codegen/src/isle_prelude.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -524,9 +524,9 @@ macro_rules! isle_common_prelude_methods {
524524
}
525525

526526
#[inline]
527-
fn offset32(&mut self, x: Offset32) -> Option<u32> {
527+
fn offset32(&mut self, x: Offset32) -> u32 {
528528
let x: i32 = x.into();
529-
Some(x as u32)
529+
x as u32
530530
}
531531

532532
#[inline]

cranelift/codegen/src/machinst/isle.rs

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -46,15 +46,6 @@ macro_rules! isle_lower_prelude_methods {
4646
() => {
4747
isle_common_prelude_methods!();
4848

49-
#[inline]
50-
fn same_value(&mut self, a: Value, b: Value) -> Option<Value> {
51-
if a == b {
52-
Some(a)
53-
} else {
54-
None
55-
}
56-
}
57-
5849
#[inline]
5950
fn value_type(&mut self, val: Value) -> Type {
6051
self.lower_ctx.dfg().value_type(val)

cranelift/codegen/src/prelude.isle

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@
5757
;; Extractor that pulls apart an Offset32 into a u32 with the raw
5858
;; signed-32-bit twos-complement bits.
5959
(decl offset32 (u32) Offset32)
60-
(extern extractor offset32 offset32)
60+
(extern extractor infallible offset32 offset32)
6161

6262
;; Pure/fallible constructor that tests if one u32 is less than or
6363
;; equal to another.

cranelift/codegen/src/prelude_lower.isle

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -189,10 +189,6 @@
189189
(extractor (unwrap_head_value_list_2 head1 head2 tail)
190190
(value_list_slice (value_slice_unwrap head1 (value_slice_unwrap head2 tail))))
191191

192-
;; Constructor to test whether two values are same.
193-
(decl pure same_value (Value Value) Value)
194-
(extern constructor same_value same_value)
195-
196192
;; Turn a `Writable<Reg>` into a `Reg` via `Writable::to_reg`.
197193
(decl writable_reg_to_reg (WritableReg) Reg)
198194
(extern constructor writable_reg_to_reg writable_reg_to_reg)

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