Emit mulx for X86Base.BigMul BMI2 is supported

Author: Daniel-Svensson

src/coreclr/jit/hwintrinsiccodegenxarch.cpp

@@ -2364,20 +2364,37 @@ void CodeGen::genX86BaseIntrinsic(GenTreeHWIntrinsic* node, insOpts instOptions)
             emitAttr attr = emitTypeSize(targetType);
             emitter* emit = GetEmitter();
 
-            if (rmOp->isUsedFromReg() && rmOp->GetRegNum() == REG_EAX)
+            // Unsigned multiplication can use mulx on BMI2-capable CPUs
+            if (ins == INS_mulEAX && compiler->compOpportunisticallyDependsOn(InstructionSet_AVX2))
             {
-                std::swap(rmOp, regOp);
+                // op1: EDX, op2: reg/mem (operand 3) => hiRes: (operand 1), lowReg: (operand 2)
+                assert((regOp->GetRegNum() == REG_EDX) || (rmOp->GetRegNum() != REG_EDX));
+
+                // mov the first operand into implicit source operand EDX/RDX
+                emit->emitIns_Mov(INS_mov, attr, REG_EDX, regOp->GetRegNum(), /* canSkip */ true);
+
+                // emit MULX instruction
+                regNumber lowReg = node->GetRegByIndex(0);
+                regNumber hiReg  = node->GetRegByIndex(1);
+                inst_RV_RV_TT(INS_mulx, attr, hiReg, lowReg, rmOp, /* isRMW */ false, INS_OPTS_NONE);
             }
+            else
+            {
+                if (rmOp->isUsedFromReg() && rmOp->GetRegNum() == REG_EAX)
+                {
+                    std::swap(rmOp, regOp);
+                }
 
-            // op1: EAX, op2: reg/mem
-            emit->emitIns_Mov(INS_mov, attr, REG_EAX, regOp->GetRegNum(), /* canSkip */ true);
+                // op1: EAX, op2: reg/mem
+                emit->emitIns_Mov(INS_mov, attr, REG_EAX, regOp->GetRegNum(), /* canSkip */ true);
 
-            // emit the MUL/IMUL instruction
-            emit->emitInsBinary(ins, attr, node, rmOp);
+                // emit the MUL/IMUL instruction
+                emit->emitInsBinary(ins, attr, node, rmOp);
 
-            // verify target registers are as expected
-            assert(node->GetRegByIndex(0) == REG_EAX);
-            assert(node->GetRegByIndex(1) == REG_EDX);
+                // verify target registers are as expected
+                assert(node->GetRegByIndex(0) == REG_EAX);
+                assert(node->GetRegByIndex(1) == REG_EDX);
+            }
 
             break;
         }

src/coreclr/jit/lsraxarch.cpp

@@ -2489,17 +2489,37 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou
                 assert(isRMW);
                 assert(!op1->isContained());
 
-                SingleTypeRegSet apxAwareRegCandidates =
-                    ForceLowGprForApxIfNeeded(op1, RBM_NONE, canHWIntrinsicUseApxRegs);
+                if ((baseType == TYP_ULONG || baseType == TYP_UINT) &&
+                    compiler->compOpportunisticallyDependsOn(InstructionSet_AVX2))
+                {
+                    isRMW = false;
 
-                // mulEAX always use EAX, if one operand is contained, specify other op with fixed EAX register
-                // otherwise dont force any register, we might get the second parameter in EAX
-                srcCount = BuildOperandUses(op1, op2->isContained() ? SRBM_EAX : apxAwareRegCandidates);
-                srcCount += BuildOperandUses(op2, apxAwareRegCandidates);
+                    SingleTypeRegSet apxAwareRegCandidates =
+                        ForceLowGprForApxIfNeeded(op2, RBM_NONE, canHWIntrinsicUseApxRegs);
+                    // mulx, place op1 in implicit EDX register since op2 might be contained
+                    srcCount = BuildOperandUses(op1, SRBM_EDX);
+                    srcCount += BuildOperandUses(op2, apxAwareRegCandidates);
+
+                    // result in any register
+                    SingleTypeRegSet apxAwareDestCandidates =
+                        ForceLowGprForApxIfNeeded(intrinsicTree, RBM_NONE, canHWIntrinsicUseApxRegs);
+                    BuildDef(intrinsicTree, apxAwareDestCandidates, 0);
+                    BuildDef(intrinsicTree, apxAwareDestCandidates, 1);
+                }
+                else // Signed multiply or normal unsigned multiply in one operand form
+                {
+                    SingleTypeRegSet apxAwareRegCandidates =
+                        ForceLowGprForApxIfNeeded(op1, RBM_NONE, canHWIntrinsicUseApxRegs);
 
-                // result put in EAX and EDX
-                BuildDef(intrinsicTree, SRBM_EAX, 0);
-                BuildDef(intrinsicTree, SRBM_EDX, 1);
+                    // mulEAX always use EAX, if one operand is contained, specify other op with fixed EAX register
+                    // otherwise dont force any register, we might get the second parameter in EAX
+                    srcCount = BuildOperandUses(op1, op2->isContained() ? SRBM_EAX : apxAwareRegCandidates);
+                    srcCount += BuildOperandUses(op2, apxAwareRegCandidates);
+
+                    // result put in EAX and EDX
+                    BuildDef(intrinsicTree, SRBM_EAX, 0);
+                    BuildDef(intrinsicTree, SRBM_EDX, 1);
+                }
 
                 buildUses = false;
                 break;

src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/X86Base.PlatformNotSupported.cs

@@ -67,9 +67,11 @@ internal X64() { }
             /// <summary>
             ///   <para>unsigned _umul128(unsigned __int64 Multiplier, unsigned __int64  Multiplicand, unsigned __int64 * HighProduct)</para>
             ///   <para>  MUL reg/m64</para>
+            ///   <para>  MULX reg reg reg/m64 (if BMI2 is supported)</para>
             /// </summary>
             /// <remarks>
-            ///   <para>Its functionality is exposed in the public <see cref="Math" /> class.</para>
+            ///   <para>Its functionality is exposed by the public <see cref="Math.BigMul(ulong, ulong, out ulong)" />.</para>
+            ///   <para>Can emit either mul or mulx depending on hardware</para>
             /// </remarks>
             internal static (ulong Lower, ulong Upper) BigMul(ulong left, ulong right) { throw new PlatformNotSupportedException(); }
 
@@ -128,21 +130,19 @@ internal X64() { }
 
         /// <summary>
         ///   <para>  MUL reg/m32</para>
+        ///   <para>  MULX reg reg reg/m32 (if BMI2 is supported)</para>
         /// </summary>
-        /// <remarks>
-        ///   <para>Its functionality is exposed in the public <see cref="Math" /> class.</para>
-        /// </remarks>
         internal static (uint Lower, uint Upper) BigMul(uint left, uint right) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         ///   <para>  IMUL reg/m32</para>
         /// </summary>
-        /// <remarks>
-        ///   <para>Its functionality is exposed in the public <see cref="Math" /> class.</para>
-        /// </remarks>
         internal static (int Lower, int Upper) BigMul(int left, int right) { throw new PlatformNotSupportedException(); }
 
-        /// <summary>  MUL reg/m</summary>
+        /// <summary>
+        ///   <para>  MUL reg/m</para>
+        ///   <para>  MULX reg reg reg/m (if BMI2 is supported)</para>
+        /// </summary>
         internal static (nuint Lower, nuint Upper) BigMul(nuint left, nuint right) { throw new PlatformNotSupportedException(); }
 
         /// <summary>  IMUL reg/m</summary>

src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/X86Base.cs

@@ -71,10 +71,11 @@ internal X64() { }
             /// <summary>
             ///   <para>unsigned _umul128(unsigned __int64 Multiplier, unsigned __int64  Multiplicand, unsigned __int64 * HighProduct)</para>
             ///   <para>  MUL reg/m64</para>
+            ///   <para>  MULX reg reg reg/m64 (if BMI2 is supported)</para>
             /// </summary>
             /// <remarks>
             ///   <para>Its functionality is exposed by the public <see cref="Math.BigMul(ulong, ulong, out ulong)" />.</para>
-            ///   <para>In the future it might emit mulx on compatible hardware</para>
+            ///   <para>Can emit either mul or mulx depending on hardware</para>
             /// </remarks>
             internal static (ulong Lower, ulong Upper) BigMul(ulong left, ulong right) => BigMul(left, right);
 
@@ -146,6 +147,7 @@ public static unsafe (int Eax, int Ebx, int Ecx, int Edx) CpuId(int functionId,
 #if !MONO
         /// <summary>
         ///   <para>  MUL reg/m32</para>
+        ///   <para>  MULX reg reg reg/m32 (if BMI2 is supported)</para>
         /// </summary>
         internal static (uint Lower, uint Upper) BigMul(uint left, uint right) => BigMul(left, right);
 
@@ -154,7 +156,10 @@ public static unsafe (int Eax, int Ebx, int Ecx, int Edx) CpuId(int functionId,
         /// </summary>
         internal static (int Lower, int Upper) BigMul(int left, int right) => BigMul(left, right);
 
-        /// <summary>  MUL reg/m</summary>
+        /// <summary>
+        ///   <para>  MUL reg/m</para>
+        ///   <para>  MULX reg reg reg/m (if BMI2 is supported)</para>
+        /// </summary>
         /// <remarks>Intented for UIntPtr.Bigmul https://github.com/dotnet/runtime/issues/114731 </remarks>
         internal static (nuint Lower, nuint Upper) BigMul(nuint left, nuint right) => BigMul(left, right);