|
| 1 | +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6 |
| 2 | +// REQUIRES: amdgpu-registered-target |
| 3 | +// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -emit-llvm -fcuda-is-device %s -o - | FileCheck %s |
| 4 | + |
| 5 | +#define __device__ __attribute__((device)) |
| 6 | +#define __shared__ __attribute__((shared)) |
| 7 | +#define __constant__ __attribute__((constant)) |
| 8 | + |
| 9 | +__constant__ float const_float; |
| 10 | +__constant__ double const_double; |
| 11 | +__device__ float global_float; |
| 12 | +__device__ double global_double; |
| 13 | + |
| 14 | +// CHECK-LABEL: define dso_local void @_Z30test_flat_atomic_fadd_f32_flatPff( |
| 15 | +// CHECK-SAME: ptr noundef [[PTR:%.*]], float noundef [[VAL:%.*]]) #[[ATTR0:[0-9]+]] { |
| 16 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 17 | +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 18 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca float, align 4, addrspace(5) |
| 19 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca float, align 4, addrspace(5) |
| 20 | +// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr |
| 21 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 22 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 23 | +// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8 |
| 24 | +// CHECK-NEXT: store float [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 4 |
| 25 | +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8 |
| 26 | +// CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[VAL_ADDR_ASCAST]], align 4 |
| 27 | +// CHECK-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr [[TMP0]], float [[TMP1]] syncscope("agent") monotonic, align 4, !amdgpu.no.fine.grained.memory [[META4:![0-9]+]], !amdgpu.ignore.denormal.mode [[META4]] |
| 28 | +// CHECK-NEXT: store float [[TMP2]], ptr [[RESULT_ASCAST]], align 4 |
| 29 | +// CHECK-NEXT: ret void |
| 30 | +// |
| 31 | +__device__ void test_flat_atomic_fadd_f32_flat(float *ptr, float val) { |
| 32 | + float result; |
| 33 | + result = __builtin_amdgcn_flat_atomic_fadd_f32(ptr, val); |
| 34 | +} |
| 35 | + |
| 36 | +// CHECK-LABEL: define dso_local void @_Z30test_flat_atomic_fadd_f64_flatPdd( |
| 37 | +// CHECK-SAME: ptr noundef [[PTR:%.*]], double noundef [[VAL:%.*]]) #[[ATTR0]] { |
| 38 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 39 | +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 40 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca double, align 8, addrspace(5) |
| 41 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca double, align 8, addrspace(5) |
| 42 | +// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr |
| 43 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 44 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 45 | +// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8 |
| 46 | +// CHECK-NEXT: store double [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 8 |
| 47 | +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8 |
| 48 | +// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[VAL_ADDR_ASCAST]], align 8 |
| 49 | +// CHECK-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr [[TMP0]], double [[TMP1]] syncscope("agent") monotonic, align 8, !amdgpu.no.fine.grained.memory [[META4]] |
| 50 | +// CHECK-NEXT: store double [[TMP2]], ptr [[RESULT_ASCAST]], align 8 |
| 51 | +// CHECK-NEXT: ret void |
| 52 | +// |
| 53 | +__device__ void test_flat_atomic_fadd_f64_flat(double *ptr, double val) { |
| 54 | + double result; |
| 55 | + result = __builtin_amdgcn_flat_atomic_fadd_f64(ptr, val); |
| 56 | +} |
| 57 | + |
| 58 | +// CHECK-LABEL: define dso_local void @_Z32test_flat_atomic_fadd_f32_sharedPff( |
| 59 | +// CHECK-SAME: ptr noundef [[PTR:%.*]], float noundef [[VAL:%.*]]) #[[ATTR0]] { |
| 60 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 61 | +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 62 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca float, align 4, addrspace(5) |
| 63 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca float, align 4, addrspace(5) |
| 64 | +// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr |
| 65 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 66 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 67 | +// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8 |
| 68 | +// CHECK-NEXT: store float [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 4 |
| 69 | +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8 |
| 70 | +// CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[VAL_ADDR_ASCAST]], align 4 |
| 71 | +// CHECK-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr [[TMP0]], float [[TMP1]] syncscope("agent") monotonic, align 4, !amdgpu.no.fine.grained.memory [[META4]], !amdgpu.ignore.denormal.mode [[META4]] |
| 72 | +// CHECK-NEXT: store float [[TMP2]], ptr [[RESULT_ASCAST]], align 4 |
| 73 | +// CHECK-NEXT: ret void |
| 74 | +// |
| 75 | +__device__ void test_flat_atomic_fadd_f32_shared(__shared__ float *ptr, float val) { |
| 76 | + float result; |
| 77 | + result = __builtin_amdgcn_flat_atomic_fadd_f32(ptr, val); |
| 78 | +} |
| 79 | + |
| 80 | +// CHECK-LABEL: define dso_local void @_Z32test_flat_atomic_fadd_f64_sharedPdd( |
| 81 | +// CHECK-SAME: ptr noundef [[PTR:%.*]], double noundef [[VAL:%.*]]) #[[ATTR0]] { |
| 82 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 83 | +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 84 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca double, align 8, addrspace(5) |
| 85 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca double, align 8, addrspace(5) |
| 86 | +// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr |
| 87 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 88 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 89 | +// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8 |
| 90 | +// CHECK-NEXT: store double [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 8 |
| 91 | +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8 |
| 92 | +// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[VAL_ADDR_ASCAST]], align 8 |
| 93 | +// CHECK-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr [[TMP0]], double [[TMP1]] syncscope("agent") monotonic, align 8, !amdgpu.no.fine.grained.memory [[META4]] |
| 94 | +// CHECK-NEXT: store double [[TMP2]], ptr [[RESULT_ASCAST]], align 8 |
| 95 | +// CHECK-NEXT: ret void |
| 96 | +// |
| 97 | +__device__ void test_flat_atomic_fadd_f64_shared(__shared__ double *ptr, double val) { |
| 98 | + double result; |
| 99 | + result = __builtin_amdgcn_flat_atomic_fadd_f64(ptr, val); |
| 100 | +} |
| 101 | + |
| 102 | +// CHECK-LABEL: define dso_local void @_Z34test_flat_atomic_fadd_f32_constantf( |
| 103 | +// CHECK-SAME: float noundef [[VAL:%.*]]) #[[ATTR0]] { |
| 104 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 105 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca float, align 4, addrspace(5) |
| 106 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca float, align 4, addrspace(5) |
| 107 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 108 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 109 | +// CHECK-NEXT: store float [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 4 |
| 110 | +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[VAL_ADDR_ASCAST]], align 4 |
| 111 | +// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw fadd ptr addrspacecast (ptr addrspace(4) @const_float to ptr), float [[TMP0]] syncscope("agent") monotonic, align 4, !amdgpu.no.fine.grained.memory [[META4]], !amdgpu.ignore.denormal.mode [[META4]] |
| 112 | +// CHECK-NEXT: store float [[TMP1]], ptr [[RESULT_ASCAST]], align 4 |
| 113 | +// CHECK-NEXT: ret void |
| 114 | +// |
| 115 | +__device__ void test_flat_atomic_fadd_f32_constant(float val) { |
| 116 | + float result; |
| 117 | + result = __builtin_amdgcn_flat_atomic_fadd_f32(&const_float, val); |
| 118 | +} |
| 119 | + |
| 120 | +// CHECK-LABEL: define dso_local void @_Z34test_flat_atomic_fadd_f64_constantd( |
| 121 | +// CHECK-SAME: double noundef [[VAL:%.*]]) #[[ATTR0]] { |
| 122 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 123 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca double, align 8, addrspace(5) |
| 124 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca double, align 8, addrspace(5) |
| 125 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 126 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 127 | +// CHECK-NEXT: store double [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 8 |
| 128 | +// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[VAL_ADDR_ASCAST]], align 8 |
| 129 | +// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw fadd ptr addrspacecast (ptr addrspace(4) @const_double to ptr), double [[TMP0]] syncscope("agent") monotonic, align 8, !amdgpu.no.fine.grained.memory [[META4]] |
| 130 | +// CHECK-NEXT: store double [[TMP1]], ptr [[RESULT_ASCAST]], align 8 |
| 131 | +// CHECK-NEXT: ret void |
| 132 | +// |
| 133 | +__device__ void test_flat_atomic_fadd_f64_constant(double val) { |
| 134 | + double result; |
| 135 | + result = __builtin_amdgcn_flat_atomic_fadd_f64(&const_double, val); |
| 136 | +} |
| 137 | + |
| 138 | +// CHECK-LABEL: define dso_local void @_Z32test_flat_atomic_fadd_f32_globalf( |
| 139 | +// CHECK-SAME: float noundef [[VAL:%.*]]) #[[ATTR0]] { |
| 140 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 141 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca float, align 4, addrspace(5) |
| 142 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca float, align 4, addrspace(5) |
| 143 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 144 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 145 | +// CHECK-NEXT: store float [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 4 |
| 146 | +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[VAL_ADDR_ASCAST]], align 4 |
| 147 | +// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw fadd ptr addrspacecast (ptr addrspace(1) @global_float to ptr), float [[TMP0]] syncscope("agent") monotonic, align 4, !amdgpu.no.fine.grained.memory [[META4]], !amdgpu.ignore.denormal.mode [[META4]] |
| 148 | +// CHECK-NEXT: store float [[TMP1]], ptr [[RESULT_ASCAST]], align 4 |
| 149 | +// CHECK-NEXT: ret void |
| 150 | +// |
| 151 | +__device__ void test_flat_atomic_fadd_f32_global(float val) { |
| 152 | + float result; |
| 153 | + result = __builtin_amdgcn_flat_atomic_fadd_f32(&global_float, val); |
| 154 | +} |
| 155 | + |
| 156 | +// CHECK-LABEL: define dso_local void @_Z32test_flat_atomic_fadd_f64_globald( |
| 157 | +// CHECK-SAME: double noundef [[VAL:%.*]]) #[[ATTR0]] { |
| 158 | +// CHECK-NEXT: [[ENTRY:.*:]] |
| 159 | +// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca double, align 8, addrspace(5) |
| 160 | +// CHECK-NEXT: [[RESULT:%.*]] = alloca double, align 8, addrspace(5) |
| 161 | +// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr |
| 162 | +// CHECK-NEXT: [[RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT]] to ptr |
| 163 | +// CHECK-NEXT: store double [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 8 |
| 164 | +// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[VAL_ADDR_ASCAST]], align 8 |
| 165 | +// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw fadd ptr addrspacecast (ptr addrspace(1) @global_double to ptr), double [[TMP0]] syncscope("agent") monotonic, align 8, !amdgpu.no.fine.grained.memory [[META4]] |
| 166 | +// CHECK-NEXT: store double [[TMP1]], ptr [[RESULT_ASCAST]], align 8 |
| 167 | +// CHECK-NEXT: ret void |
| 168 | +// |
| 169 | +__device__ void test_flat_atomic_fadd_f64_global(double val) { |
| 170 | + double result; |
| 171 | + result = __builtin_amdgcn_flat_atomic_fadd_f64(&global_double, val); |
| 172 | +} |
| 173 | +//. |
| 174 | +// CHECK: [[META4]] = !{} |
| 175 | +//. |
0 commit comments