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[https://nvbugs/6672360][fix] Stabilize XQA attention sink normalization - #19220
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Included review availability: Your plan provides up to 12 included reviews per hour; 11 remain after this review. WalkthroughThe attention kernel now includes attention sinks in initial and GEMM row maxima for standard and speculative-decoding layouts. Final normalization assigns zero reciprocal row sums to fully masked rows. ChangesAttention sink normalization
Priority: ⬇️ Low Estimated code review effort: 2 (Simple) | ~15 minutes Change: Bug fix Suggested reviewers: Merge Risk: ⚪ Minimal · up to No actionable current-head issue was established from the supplied evidence. 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
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In `@cpp/kernels/xqa/mha.cu`:
- Around line 1472-1497: Update addAttentionSinks so non-speculative mode
processes all headGrpSize * beamWidth rows, matching nbValidRows and the output
layout; retain the existing speculative row indexing and sink-index repetition
behavior. Ensure every valid beam row receives sink normalization instead of the
default factor 1.F.
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cpp/kernels/xqa/mha.cu
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…maxima Seed producer and consumer row maxima with the locally owned attention sink before computing softmax weights. Keep the existing denominator-only sink addition and multi-block ownership unchanged. Signed-off-by: Dongfeng Yu <dongfengy@nvidia.com>
…ization Apply the sink maximum after the existing producer hint selection, before any softmax exponentials. Preserve all shared-memory layouts and backward methods while keeping the consumer initialized to the same sink maximum. Signed-off-by: Dongfeng Yu <dongfengy@nvidia.com>
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…attention sinks Use the attention sink for every partial row maximum while retaining single-CTA ownership of its denominator contribution. Place the common maximum update directly before the softmax calculation. Signed-off-by: Dongfeng Yu <dongfengy@nvidia.com>
Use a zero reciprocal for a partial row whose softmax denominator is zero. Preserve its zero denominator so multi-block merging assigns the row zero weight. Signed-off-by: Dongfeng Yu <dongfengy@nvidia.com>
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Confirmed this PR will also fix https://nvbugs/6762288. |
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### Description - **Output ownership:** Only the final reducing CTA publishes multi-block attention output; other CTAs cannot overwrite it with partial results. - **Synchronization:** All threads latch the final-CTA flag before its shared memory is reused. Four more `cp.async` drains / warp barriers on the same path (after GEMM0, before `mergeAndSaveOutTile`, at the start of `loadBufAsync` and after the `waitGroup<1>()` in the multi-block merge loop) were compiled only for `XQA_PAGED_INT4`; they are now enabled for every variant. Two more `__syncwarp()`s, after the K-tile wait in the GEMM0 loop and after the V-tile wait in `syncVTileLoad`, are ported from [NVIDIA/TensorRT-LLM#18141](NVIDIA/TensorRT-LLM#18141): `cp.async.wait_group` only waits for the copies of the executing thread, but every lane reads tile data that other lanes of the warp copied. - **Regression coverage:** `XqaMultiBlockTest` (fp16 and bf16) runs 24 independent decode problems per launch on 4 concurrent streams, each with its own workspace and output, with K/V in mapped host memory. That is what makes the races observable; a single decode problem on one stream passes on the unpatched kernel. It covers head sizes 64, 128 and 256 (256 has a single GEMM1 warp group, so the CTA output is staged in a different shared-memory buffer), group sizes 1, 2 and 4, batch 1, 2 and 4, a sliding window with per-head attention sinks, 1 and 4 sub-sequences, direct launches and CUDA graph replay. Every variant captures a 4-stream fork/join graph and asserts that the multi-block grid is launched. The test is skipped below sm_80. ### Motivation and Context GQA decoding with aliased past/present KV caches can intermittently corrupt attention and change generated tokens, especially under CUDA graph capture. Eligible shared-cache decoding selects XQA independently of `sdpa_kernel`, so requesting Flash does not exclude the affected path. ### Testing The A100 section below was measured on the first revision of this PR (8 tests, without the two K / V `__syncwarp()`s and the head size 256 tests); the H200 section covers the current revision. #### A100-SXM4-80GB (sm_80), first revision CUDA 13.0, Release, built with `CMAKE_CUDA_ARCHITECTURES=80`, `onnxruntime_BUILD_UNIT_TESTS=ON`, `onnxruntime_ENABLE_CUDA_EP_INTERNAL_TESTS=ON`, targets `onnxruntime_provider_test` and `onnxruntime_providers_cuda_ut`: ```bash cd build/<config>/Release GTEST_FILTER='XqaMultiBlockTest*' ./onnxruntime_provider_test --gtest_filter='CUDA_EP_Unittest.All' ``` **The test detects the bug.** The previous version of the test passed in 24/24 processes on the unpatched kernel. The current version, 24 independent processes per row with all 8 tests in each: | `mha_impl.cuh` | Result | |---|---| | `main` (both race-fix hunks reverted) | **0/24 pass**: all 8 tests fail in every run, typically within the first few launches per stream | | the two race-fix hunks only | 24/24 pass | | this PR | 24/24 pass (192 test runs, none skipped) | **The four extra sync sites matter.** `compute-sanitizer --tool racecheck` on the fp16 head size 64 test, one repeat per configuration: | | errors | racing instruction pairs | pairs involving `cp.async` | |---|---|---|---| | the two race-fix hunks only | 634 | 347 | 328 | | this PR | 168 | 19 | 0 | The 19 remaining pairs (`LDSM`/`STS`, `LDS`/`STS`) are also present without this change. I believe they are the GEMM0 → GEMM1 tile hand-off, which the `xBar` / `ctaRowMax` mbarriers order and racecheck does not model, but I have not proven that. **Cost of the four sync sites.** CUDA graph replay of 100 back-to-back launches, median of 3 runs on one A100, 12 shapes (head size 64/128, group size 1/4, batch 1/8, length 505–2503): +0.0% to +1.1%, for example 15.57 → 15.68 µs and 25.16 → 25.42 µs. **Regression suites** (no failures; skipped cases need WebGPU, Flash Attention or a PagedAttention EP that this build does not enable, SM89+ for FP8, or SM90+ for cuDNN paged SDPA and H512 MEA): | Suites | Passed | Skipped | |---|---|---| | `GroupQueryAttention{,GrowingCache,Position,ShapeInference}Test.*` | 107 | 25 | | `PagedAttention.*`, `SparsePagedAttention.*` | 45 | 53 | | `*PagedAttentionXqa*`, `*SparsePagedAttentionInt8*` (INT8 XQA) | 12 | 2 (FP8) | | internal `Xqa*` (8 multi-block, 2 H512) | 10 | 0 | #### H200 (sm_90a), current revision CUDA 13.0, Release, built for `sm_90a` with the same options and targets; Flash Attention and memory-efficient attention are not compiled in. ORT runs the same `mha_impl.cuh` kernel on sm_90 (the Hopper `gmma_impl.cuh` is not built). | `mha_impl.cuh` | `XqaMultiBlockTest*` (10 tests) | |---|---| | `main` | **0/10 pass**: every test fails, including both head size 256 tests | | this PR before the K / V `__syncwarp()`s | 10/10 pass | | this revision | 10/10 pass in each of 7 parallel processes (one per GPU), none skipped | The two K / V `__syncwarp()`s are hardening, not a failure I can reproduce: the tests also pass without them on H200, and racecheck does not model intra-warp `cp.async` visibility. They follow from the `cp.async.wait_group` semantics and match [NVIDIA/TensorRT-LLM#18141](NVIDIA/TensorRT-LLM#18141), which includes them in its fix for the same race. The head size 256 tests cover the original race fix for a kernel configuration that was not tested before. **Cost of the two K / V `__syncwarp()`s.** CUDA graph replay of 50 back-to-back launches (min of 9 trials per run), median of 4 alternating A/B rounds, 10 shapes (head size 64/128/256, batch 1–32, length 1024–8192), fp16 and bf16: median change +0.02%, range −0.43% to +0.86%, within the round-to-round noise (about ±1–2%). For example 14.87 → 14.83 µs (head size 128, batch 1, length 8192), 12.01 → 12.06 µs (head size 64) and 20.30 → 20.47 µs (head size 256). **Regression suites on this revision:** | Suites | Passed | Skipped | Failed | |---|---|---|---| | `GroupQueryAttention{,GrowingCache,Position,ShapeInference}Test.*` | 108 | 24 | 0 | | `PagedAttention.*`, `SparsePagedAttention.*` | 47 | 46 | 5 | | `*PagedAttentionXqa*`, `*SparsePagedAttentionInt8*` (INT8 and FP8 XQA) | 14 | 0 | 0 | | internal `Xqa*` (10 multi-block, 2 H512) | 12 | 0 | 0 | The 5 `PagedAttention` failures (`Cuda_SkipInputSanitizerCudaGraphReplayChangingLengths`, `Cuda_SkipInputSanitizerRaggedSmallBatchParity`, `Cuda_XqaNativeFp16CacheMultiTokenBoundFallsBack`, `Cuda_XqaSpecDecInt8CacheHeadSize128NonCausalFallsBack`, `Cuda_XqaSpecDecInt8CacheHeadSize128UnsupportedWidthFallsBack`) are not caused by this PR: they expect a Flash Attention / memory-efficient fallback (`PagedAttention requires FlashAttention ...`), which this build does not compile in, and they fail the same way on `main` and on the PR before this revision. **Not covered:** GPUs other than sm_80 and sm_90a, Windows (the `_WIN32` environment-variable handling in the test was kept from the earlier revision but not compiled here), builds with Flash Attention enabled, and the Python GQA tests. ### Comparison with TensorRT-LLM Compared with [NVIDIA/TensorRT-LLM#18141](NVIDIA/TensorRT-LLM#18141) and every later change to `cpp/kernels/xqa` in TensorRT-LLM (the numbers in the table are TensorRT-LLM pull requests): | TensorRT-LLM change | Status here | |---|---| | [TRT-LLM#18141]: only the final reducing CTA writes the output, `isLastCta` is latched by all threads before shared memory is reused, GEMM0 `cp.async` drain | In this PR | | [TRT-LLM#18141]: `__syncwarp()`s inside the multi-block merge loop | Covered by the barriers at the start of `loadBufAsync` and after `waitGroup<1>()` that this PR enables for every variant | | [TRT-LLM#18141]: `__syncwarp()` after the K-tile and V-tile `cp.async` waits | **Added in this revision** | | [TRT-LLM#18141]: `gemm0ToPostProcBarrier` mbarrier | Not needed: the `__syncthreads()` at the end of GEMM0 pairs with the first `__syncthreads()` of the GEMM1 post-processing (`needMergeGlobal` or `mergeAndSaveOutTile`), which orders the same hand-off; warps that already exited are not waited for | | [TRT-LLM#18141] (sink handled by CTA 0 only) and [TRT-LLM#19220] (sink in the initial row max, zero-denominator guard) | Not applicable: the sink is still added once in the final reduction, with the merged row max. The sliding-window tests check per-head sinks of 4.0–6.0 against the analytic reference with 1 and 4 sub-sequences, and a sink applied twice would move the result by at least 13%, far above the tolerance | | [TRT-LLM#14459] (paged sliding window with unmapped pages) | Not needed: `LaunchSanitizeBlockTable` maps page ids outside `[-1, num_blocks)` to -1, `HeadPtr::operator+` turns them into `nullptr`, and `copyPartialHeadsAsync` zero-fills them | | [TRT-LLM#15739] (speculative-decoding sinks) | Already equivalent here | | [TRT-LLM#17976] (SM120 performance) | `writesOutput` is part of this PR. The V-page cursor rewrite is not needed: ORT only instantiates 128-token pages, and for every head size and `cacheVTileSeqLen`, `nbVItersPerXIter > 1` only occurs with `xIterSeqStride <= tokensPerPage`, where the old and the new cursor stepping are identical | | [TRT-LLM#12170] (`__CUDA_ARCH__ == 1210` in the XQA per-architecture tables) | Not needed for correctness: ORT's unknown-architecture `#else` default already gives sm_121 the sm_120 values. Ported as explicit parity in #33762 | | [TRT-LLM#10335] (performance), [TRT-LLM#11066] and the Hopper part of [TRT-LLM#14459] (`gmma_impl.cuh`, not built by ORT), [TRT-LLM#15312] (host runner) | Not applicable | [TRT-LLM#10335]: NVIDIA/TensorRT-LLM#10335 [TRT-LLM#11066]: NVIDIA/TensorRT-LLM#11066 [TRT-LLM#12170]: NVIDIA/TensorRT-LLM#12170 [TRT-LLM#14459]: NVIDIA/TensorRT-LLM#14459 [TRT-LLM#15312]: NVIDIA/TensorRT-LLM#15312 [TRT-LLM#15739]: NVIDIA/TensorRT-LLM#15739 [TRT-LLM#17976]: NVIDIA/TensorRT-LLM#17976 [TRT-LLM#18141]: NVIDIA/TensorRT-LLM#18141 [TRT-LLM#19220]: NVIDIA/TensorRT-LLM#19220 <!-- START COPILOT CODING AGENT SUFFIX --> - Fixes #33562 --------- Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com> Co-authored-by: tianleiwu <30328909+tianleiwu@users.noreply.github.com> Co-authored-by: Tianlei Wu <tlwu@microsoft.com> Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Description
Why the numerical error occurs
One kernel processes several query positions together. They share token tiles, but each position has its own recent-token window. For a small example, use a window of 3 tokens and tiles of 4 tokens:
0, 1, 2, 3.4, 5, 6(the final tile is partially filled).3, 4, 534, 54, 5, 64, 5, 6Tile A is needed for position 5, but all its tokens are too old for position 6. The tile contains data; that particular row has no valid attention scores.
For that empty row, the old maximum behaves like this:
Softmax uses
exp(score - m). If the block responsible for adding the sink has such an empty row, an example sink score of2giveswhich overflows to infinity in the kernel. Rescaling this partial result during merging can then produce
infinity * 0 = NaN.Including the sink in the initial maximum makes the same example safe:
Only one block adds the sink to the denominator. Other empty partials with a zero denominator contribute zero, avoiding division by zero during normalization.
Implementation
Include attention sinks in the initial row maximum before computing softmax weights. This prevents a fully masked sliding-window partial from exponentiating the sink against the sentinel maximum. Keep the sink's denominator contribution in one partial CTA, and use a zero reciprocal for empty partial rows so they contribute zero during multi-block merging.
Test Coverage
Reproduced the original four-GPU GPT-OSS-120B Eagle3 no-overlap timeout at exact commit
09c7f9b72d23and upstream2ebe4e65193c.Final candidate
ca53bad9490701c56d808faf2bbe8cca090c993f: 408 direct XQA BF16 cases, including speculative decoding, ordinary decoding, and trailing-query sliding-window boundaries. All outputs are finite and written; maximum absolute reference error is 0.00379521, within the existing native XQA comparator's 0.05 criterion for these kernel flags. The native C++ suite itself was not run by this diagnostic.The additional stricter 0.003 diagnostic still fails 20 cases. Independent analysis reproduces the representative difference from intermediate BF16 rounding, with the sink counted once; this stricter diagnostic is not reported as passing.
The final clean-wheel build and installed-runtime verification passed for this head. Embedded kernel source and dependency pins match the validated inputs. The original four-GPU full-model testcase passed with unchanged assertions and timeouts: GSM8K 89.765% (1,319 samples; threshold 87.097%) and GPQA Diamond 60.606% (198 samples; threshold 55.734%). All 1,517 responses finished with
stop; none hit the token cap or showed the original all-zero token tails or repeated-exclamation suffixes. The result and installed source were independently reviewed.accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v1_kv_cache-cutlass-one_model-no_overlap_scheduler]Current-head L0 CI #60578 passed with
/bot run --disable-fail-fast. The retry reran the failed stages and reused successful stages from the same commit in #60549.Kernel and full-model validation above are for
ca53bad9490701c56d808faf2bbe8cca090c993f, based on2ebe4e65193c. The overlap variant was not rerun.PR Checklist
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Dev Engineer Review
cpp/kernels/xqa/mha.cuincludes attention sinks in partial-row maxima and avoids invalid reciprocal normalization for fully masked rows.L0_MergeRequest_PR#60578 passed.QA Engineer Review
No test changes.
Per-File QA Perspective
cpp/kernels/xqa/mha.cu: Verify fully masked sliding-window rows, speculative-decoding layouts, multi-block merging, sink ownership, synchronization, and finite outputs. Validate the overlap variant.