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This reverts commit 2c562a6.
…and mt6589-pctl-b-syscfg
The 'drv_offset' member in 'struct mtk_pinctrl_devdata' has been unused since the driver's inception. Drive strength control for MediaTek pinctrl drivers is actually configured via 'pin_drv_grp', making this specific offset field redundant. Remove the unused field from the common 'mtk_pinctrl_devdata' structure and its corresponding initialization in the mt8365 driver to clean up the code and avoid confusion. Signed-off-by: Akari Tsuyukusa <akkun11.open@gmail.com>
The current common-v1 framework implicitly assumes that certain register operations might span across multiple base addresses. This logic is currently hardcoded in mtk_get_regmap, where any pin falling within the [type1_start, type1_end) range is redirected to regmap2. This approach is suboptimal for two reasons: 1. It forces all SoCs except MT8135 to define dummy type1_start/end values (set to the last pin number + 1) to avoid unintended regmap switching, which is non-intuitive and cluttering the SoC data. 2. It assumes most register types (DRV, IES, SMT, etc.) follow the same splitting rule, even though hardware design might only require it for specific functional registers. Refactor the framework by introducing explicit '[func]_multibase' flags for each register category in struct mtk_pinctrl_devdata. This allows each SoC to explicitly declare which operations require multiple bases. For MT8135, which is currently the only multipre regmap user, enable needed multibase flags to keep existing behavior. For other SoCs, multibase flags will default to false, removing the need for fragile range-based workarounds and making the regmap selection logic more robust and explicit. Also, delete type1_start and type1_end, which are no longer needed by this refactor, from struct mtk_pinctrl_devdata. Signed-off-by: Akari Tsuyukusa <akkun11.open@gmail.com>
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not perfect, but it looks good. |
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