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Add support for SVD dimIndex parsing#508

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mattnite merged 18 commits intoZigEmbeddedGroup:mainfrom
zovko:svd_dim_element
May 3, 2025
Merged

Add support for SVD dimIndex parsing#508
mattnite merged 18 commits intoZigEmbeddedGroup:mainfrom
zovko:svd_dim_element

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@zovko
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@zovko zovko commented Apr 28, 2025

DimElementGroup support for peripheral, register and field types (without dimName)

New features:

Changed implementation:

  • Fields cannot have DimElementGroup array type.
  • elements.dim_increment * 8) != size removed. This is not always true, specifically for list types.

Note: This heavily breaks esp examples, rasperrypi seems to still compile.

Partially solves #220

Still to implement:

  • dimName, displayName
  • CSV parsing for dimIndex

@zovko zovko marked this pull request as ready for review April 30, 2025 22:38
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Looks good to me, just get the fixes that @Grazfather has suggested in. It looks like this changes the generated code for esp which will need updating, when I have time I could try to add that to the PR for you tomorrow.

For the stm32 CI failure all you need to do is run zig build -Dgenerate in the port/stmicro/stm32 directory and commit the changes.

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zovko commented May 1, 2025

@mattnite The changes do not look good for stm32 now, for example SQR1 is definitely different now. What to do about that specifically? I added the commit here but I believe the stm32 builds will be broken now.

@zovko zovko requested a review from mattnite May 1, 2025 21:46
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mattnite commented May 3, 2025

@zovko apply this patch and it should fix the last CI failure. It looks like the old code was trying its best to make repeated registers into arrays, and so I changed some registers to use [%s] instead of <name>%s to create arrays instead of creating distinct registers.

diff --git a/port/espressif/esp/src/chips/ESP32-C3.svd b/port/espressif/esp/src/chips/ESP32-C3.svd
index ab064fa..ff363b2 100644
--- a/port/espressif/esp/src/chips/ESP32-C3.svd
+++ b/port/espressif/esp/src/chips/ESP32-C3.svd
@@ -11190,7 +11190,7 @@
         <register>
           <dim>26</dim>
           <dimIncrement>0x4</dimIncrement>
-          <name>PIN%s</name>
+          <name>PIN[%s]</name>
           <description>GPIO pin configuration register</description>
           <addressOffset>0x74</addressOffset>
           <size>0x20</size>
@@ -11264,7 +11264,7 @@
         <register>
           <dim>128</dim>
           <dimIncrement>0x4</dimIncrement>
-          <name>FUNC%s_IN_SEL_CFG</name>
+          <name>FUNC_IN_SEL_CFG[%s]</name>
           <description>GPIO input function configuration register</description>
           <addressOffset>0x154</addressOffset>
           <size>0x20</size>
@@ -11295,7 +11295,7 @@
         <register>
           <dim>26</dim>
           <dimIncrement>0x4</dimIncrement>
-          <name>FUNC%s_OUT_SEL_CFG</name>
+          <name>FUNC_OUT_SEL_CFG[%s]</name>
           <description>GPIO output function select register</description>
           <addressOffset>0x554</addressOffset>
           <size>0x20</size>
@@ -12846,7 +12846,7 @@
         <register>
           <dim>8</dim>
           <dimIncrement>0x4</dimIncrement>
-          <name>COMD%s</name>
+          <name>COMD[%s]</name>
           <description>I2C_COMD%s_REG</description>
           <addressOffset>0x58</addressOffset>
           <size>0x20</size>
@@ -15904,7 +15904,7 @@
         <register>
           <dim>22</dim>
           <dimIncrement>0x4</dimIncrement>
-          <name>GPIO%s</name>
+          <name>GPIO[%s]</name>
           <description>IO MUX Configure Register for pad XTAL_32K_P</description>
           <addressOffset>0x4</addressOffset>
           <size>0x20</size>
@@ -36929,4 +36929,4 @@
       </registers>
     </peripheral>
   </peripherals>
-</device>
\ No newline at end of file
+</device>

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zovko commented May 3, 2025

@mattnite Should that patch even be done? It doesn't sound right to update the vendor SVD with local changes. What would be the reason to change the registers from sequence to array? This can also easily introduce bugs if the dimIncrement is different than register size (not the case for suggested patch though). But regardless, this practice can introduce more bugs in future. For example, the modifications in patch cannot be done for CH%s_RX_CONF0 (in C3 SVD version 18).

I would even advise to update the SVD file itself for C3. Latest version is version 18 (link) while the current SVD file in the repo is version 8. I would rather update the examples than the SVD itself to make the examples compile.

Also, with SVD modification it will also break the direct link to the documentation, for example:
-FUNC%s_IN_SEL_CFG
+FUNC_IN_SEL_CFG[%s]

Documentation can be easily searchable for FUNC0_IN_SEL_CFG, while FUNC_IN_SEL_CFG will not be found.

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mattnite commented May 3, 2025

Yes it's okay to apply this patch. I want to get this functionality into Regz, and we'll eventually move over to directly fetching those SVD files from that repo.

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zovko commented May 3, 2025

@mattnite applied the patch to C3 SVD

@mattnite mattnite merged commit 958ab32 into ZigEmbeddedGroup:main May 3, 2025
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@zovko zovko deleted the svd_dim_element branch May 3, 2025 22:34
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3 participants