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Merged
saulecabrera merged 3 commits into from
Jan 20, 2025
Merged

Winch: extract_lane instructions on x64 with AVX #10042

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f2f52c1
Winch: extract_lane instructions
jeffcharles Jan 17, 2025
cebfdc4
Merge branch 'main' into winch-simd-extract-lanes
jeffcharles Jan 17, 2025
2705b31
Merge branch 'main' into winch-simd-extract-lanes
jeffcharles Jan 20, 2025
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6 changes: 3 additions & 3 deletions crates/wast-util/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -430,7 +430,6 @@ impl WastTest {
"misc_testsuite/simd/issue_3327_bnot_lowering.wast",
"misc_testsuite/simd/load_splat_out_of_bounds.wast",
"misc_testsuite/simd/replace-lane-preserve.wast",
"misc_testsuite/simd/spillslot-size-fuzzbug.wast",
"misc_testsuite/simd/unaligned-load.wast",
"multi-memory/simd_memory-multi.wast",
"spec_testsuite/simd_bit_shift.wast",
Expand Down Expand Up @@ -478,8 +477,6 @@ impl WastTest {
"spec_testsuite/simd_load32_lane.wast",
"spec_testsuite/simd_load64_lane.wast",
"spec_testsuite/simd_load8_lane.wast",
"spec_testsuite/simd_load_extend.wast",
"spec_testsuite/simd_load_splat.wast",
"spec_testsuite/simd_load_zero.wast",
"spec_testsuite/simd_splat.wast",
"spec_testsuite/simd_store16_lane.wast",
Expand All @@ -501,9 +498,12 @@ impl WastTest {
#[cfg(target_arch = "x86_64")]
if !(std::is_x86_feature_detected!("avx") && std::is_x86_feature_detected!("avx2")) {
let unsupported = [
"misc_testsuite/simd/spillslot-size-fuzzbug.wast",
"misc_testsuite/winch/_simd_lane.wast",
"misc_testsuite/winch/_simd_splat.wast",
"spec_testsuite/simd_align.wast",
"spec_testsuite/simd_load_extend.wast",
"spec_testsuite/simd_load_splat.wast",
];

if unsupported.iter().any(|part| self.path.ends_with(part)) {
Expand Down
36 changes: 36 additions & 0 deletions tests/disas/winch/x64/f32x4_extract_lane/first_lane_avx.wat
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@@ -0,0 +1,36 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result f32)
(f32x4.extract_lane 0 (v128.const i32x4 0 1 2 3))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3a
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0xc(%rip), %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3a: ud2
;; 3c: addb %al, (%rax)
;; 3e: addb %al, (%rax)
;; 40: addb %al, (%rax)
;; 42: addb %al, (%rax)
;; 44: addl %eax, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb (%rax), %al
;; 4a: addb %al, (%rax)
;; 4c: addl (%rax), %eax
;; 4e: addb %al, (%rax)
42 changes: 42 additions & 0 deletions tests/disas/winch/x64/f32x4_extract_lane/second_lane_avx.wat
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@@ -0,0 +1,42 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result f32)
(f32x4.extract_lane 1 (v128.const i32x4 0 1 2 3))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3f
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpshufd $1, %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3f: ud2
;; 41: addb %al, (%rax)
;; 43: addb %al, (%rax)
;; 45: addb %al, (%rax)
;; 47: addb %al, (%rax)
;; 49: addb %al, (%rax)
;; 4b: addb %al, (%rax)
;; 4d: addb %al, (%rax)
;; 4f: addb %al, (%rax)
;; 51: addb %al, (%rax)
;; 53: addb %al, (%rcx)
;; 55: addb %al, (%rax)
;; 57: addb %al, (%rdx)
;; 59: addb %al, (%rax)
;; 5b: addb %al, (%rbx)
;; 5d: addb %al, (%rax)
36 changes: 36 additions & 0 deletions tests/disas/winch/x64/f64x2_extract_lane/first_lane_avx.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result f64)
(f64x2.extract_lane 0 (v128.const i64x2 0 1))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3a
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0xc(%rip), %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3a: ud2
;; 3c: addb %al, (%rax)
;; 3e: addb %al, (%rax)
;; 40: addb %al, (%rax)
;; 42: addb %al, (%rax)
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addl %eax, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
42 changes: 42 additions & 0 deletions tests/disas/winch/x64/f64x2_extract_lane/second_lane_avx.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result f64)
(f64x2.extract_lane 1 (v128.const i64x2 0 1))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3f
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpshufd $0xee, %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3f: ud2
;; 41: addb %al, (%rax)
;; 43: addb %al, (%rax)
;; 45: addb %al, (%rax)
;; 47: addb %al, (%rax)
;; 49: addb %al, (%rax)
;; 4b: addb %al, (%rax)
;; 4d: addb %al, (%rax)
;; 4f: addb %al, (%rax)
;; 51: addb %al, (%rax)
;; 53: addb %al, (%rax)
;; 55: addb %al, (%rax)
;; 57: addb %al, (%rcx)
;; 59: addb %al, (%rax)
;; 5b: addb %al, (%rax)
;; 5d: addb %al, (%rax)
39 changes: 39 additions & 0 deletions tests/disas/winch/x64/i16x8_extract_lane_s/const_avx.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,39 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result i32)
(i16x8.extract_lane_s 1 (v128.const i16x8 0 1 2 3 4 5 6 7))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x43
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpextrw $1, %xmm0, %eax
;; movswl %ax, %eax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 43: ud2
;; 45: addb %al, (%rax)
;; 47: addb %al, (%rax)
;; 49: addb %al, (%rax)
;; 4b: addb %al, (%rax)
;; 4d: addb %al, (%rax)
;; 4f: addb %al, (%rax)
;; 51: addb %al, (%rcx)
;; 53: addb %al, (%rdx)
;; 55: addb %al, (%rbx)
;; 57: addb %al, (%rax, %rax)
;; 5a: addl $0x7000600, %eax
40 changes: 40 additions & 0 deletions tests/disas/winch/x64/i16x8_extract_lane_u/const.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,40 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result i32)
(i16x8.extract_lane_u 1 (v128.const i16x8 0 1 2 3 4 5 6 7))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x40
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpextrw $1, %xmm0, %eax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 40: ud2
;; 42: addb %al, (%rax)
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addb %al, (%rax)
;; 52: addl %eax, (%rax)
;; 54: addb (%rax), %al
;; 56: addl (%rax), %eax
;; 58: addb $0, %al
;; 5a: addl $0x7000600, %eax
42 changes: 42 additions & 0 deletions tests/disas/winch/x64/i32x4_extract_lane/const_avx.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result i32)
(i32x4.extract_lane 1 (v128.const i32x4 0 1 2 3))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x40
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpextrd $1, %xmm0, %eax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 40: ud2
;; 42: addb %al, (%rax)
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addb %al, (%rax)
;; 52: addb %al, (%rax)
;; 54: addl %eax, (%rax)
;; 56: addb %al, (%rax)
;; 58: addb (%rax), %al
;; 5a: addb %al, (%rax)
;; 5c: addl (%rax), %eax
;; 5e: addb %al, (%rax)
42 changes: 42 additions & 0 deletions tests/disas/winch/x64/i64x2_extract_lane/const.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result i64)
(i64x2.extract_lane 1 (v128.const i64x2 0 1))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x40
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpextrq $1, %xmm0, %rax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 40: ud2
;; 42: addb %al, (%rax)
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addb %al, (%rax)
;; 52: addb %al, (%rax)
;; 54: addb %al, (%rax)
;; 56: addb %al, (%rax)
;; 58: addl %eax, (%rax)
;; 5a: addb %al, (%rax)
;; 5c: addb %al, (%rax)
;; 5e: addb %al, (%rax)
38 changes: 38 additions & 0 deletions tests/disas/winch/x64/i8x16_extract_lane_s/const_avx.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,38 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result i32)
(i8x16.extract_lane_s 1 (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x43
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpextrb $1, %xmm0, %eax
;; movsbl %al, %eax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 43: ud2
;; 45: addb %al, (%rax)
;; 47: addb %al, (%rax)
;; 49: addb %al, (%rax)
;; 4b: addb %al, (%rax)
;; 4d: addb %al, (%rax)
;; 4f: addb %al, (%rax)
;; 51: addl %eax, (%rdx)
;; 53: addl 0x9080706(, %rax), %eax
;; 5a: orb (%rbx), %cl
;; 5c: orb $0xd, %al
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