x64: Update codegen of XmmCmove pseudo-inst#10839
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In bytecodealliance#4317 this instruction was updated to handle 128-bit vectors in addition to the previous handling of 32/64-bit floats. Originally the pseudo-instruction used `movs{s,d}` to achieve its task and when adding 128-bit support I mistakenly switched both f32/f64 paths to using `movsd` instead of conditionally using `movss` for `f32`. In retrospect though it's probably best to use a full register move here instead of just a singular mov because `movss` and `movsd` preserve the upper bits of the register, needlessly creating a data dependency with the previous value in the register. This commit updates this helper to using `Inst::gen_move` which already internally does this optimization of using `movaps`, a documented zero-latency instruction, for all xmm-style register movements.
alexcrichton
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cfallin and
dicej
and removed request for
a team
cfallin
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May 27, 2025
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In #4317 this instruction was updated to handle 128-bit vectors in addition to the previous handling of 32/64-bit floats. Originally the pseudo-instruction used
movs{s,d}to achieve its task and when adding 128-bit support I mistakenly switched both f32/f64 paths to usingmovsdinstead of conditionally usingmovssforf32. In retrospect though it's probably best to use a full register move here instead of just a singular mov becausemovssandmovsdpreserve the upper bits of the register, needlessly creating a data dependency with the previous value in the register.This commit updates this helper to using
Inst::gen_movewhich already internally does this optimization of usingmovaps, a documented zero-latency instruction, for all xmm-style register movements.