s390x: Codegen fixes and preparation for ISLE migration#3702
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In preparing the back-end to move to ISLE, I detected a number of codegen bugs in the existing code, which are fixed here: - Fix internal compiler error with uload16/icmp corner case. - Fix broken Cls lowering. - Correctly mask shift count for i8/i16 shifts. In addition, I made several changes to operand encodings in various MInst patterns. These should not have any functional effect, but will make the ISLE migration easier: - Encode floating-point constants as u32/u64 in MInst patterns. - Encode shift amounts as u8 and Reg in ShiftOp pattern. - Use MemArg in LoadMultiple64 and StoreMultiple64 patterns.
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Thanks!
The changes to the encoding tests look plausible to me but I didn't go as far as double-checking against the s390x assembler or anything like that, so I'll trust you checked those. Otherwise, good refactoring 👍
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In preparing the back-end to move to ISLE, I detected a
number of codegen bugs in the existing code, which are
fixed here:
In addition, I made several changes to operand encodings
in various MInst patterns. These should not have any
functional effect, but will make the ISLE migration easier:
CC @cfallin