Cranelift: aarch64: fix undefined dest reg in f32x4.splat case.#5987
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One of the cases for a splat operation, as updated in bytecodealliance#5370, wrote to a temp reg but then only conditionally transformed the temp into the final destination register. In another codepath, `rd` was left undefined. This causes a panic later when regalloc2 verifies SSA properties of its input (here, value not def'd before use). Fixes bytecodealliance#5985.
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One of the cases for a splat operation, as updated in #5370, wrote to a temp reg but then only conditionally transformed the temp into the final destination register. In another codepath,
rdwas left undefined. This causes a panic later when regalloc2 verifies SSA properties of its input (here, value not def'd before use).Fixes #5985.