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Winch: implement rmw add ops#9990

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saulecabrera merged 10 commits into
bytecodealliance:mainfrom
MarinPostma:winch-x64-rmw-add
Jan 15, 2025
Merged

Winch: implement rmw add ops#9990
saulecabrera merged 10 commits into
bytecodealliance:mainfrom
MarinPostma:winch-x64-rmw-add

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@MarinPostma
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impl read-modify-write add for winch:

  • i32.atomic.rmw8.add_u
  • i32.atomic.rmw16.add_u
  • i32.atomic.rmw.add
  • i64.atomic.rmw8.add_u
  • i64.atomic.rmw16.add_u
  • i64.atomic.rmw32.add_u
  • i64.atomic.rmw.add

#9734

@MarinPostma MarinPostma requested review from a team as code owners January 13, 2025 00:34
@MarinPostma MarinPostma requested review from cfallin and dicej and removed request for a team January 13, 2025 00:34
@github-actions github-actions Bot added the winch Winch issues or pull requests label Jan 13, 2025
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I can take this review.

@saulecabrera saulecabrera requested review from saulecabrera and removed request for cfallin and dicej January 13, 2025 14:16
@MarinPostma MarinPostma mentioned this pull request Jan 14, 2025
@MarinPostma MarinPostma force-pushed the winch-x64-rmw-add branch 2 times, most recently from 028a95e to a5e07de Compare January 14, 2025 11:44
Comment thread winch/codegen/src/visitor.rs Outdated
&arg,
RmwOp::Add,
OperandSize::S16,
Some(ExtendKind::I32Extend16S),
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The extension kinds used in this case are signed, however the spec states zero extension instead. I believe we need to augment ExtendKind to account for the missing unsigned extensions.

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@MarinPostma MarinPostma Jan 14, 2025

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that's because https://github.com/bytecodealliance/wasmtime/blob/main/winch/codegen/src/isa/x64/asm.rs#L395-L401 takes ExtendKind, even though movzx zero-extend. I can do that in a followup, if that's ok? i'll add variants for unsigned conversions, and update any affected code.

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I've extended ExtendKind here #10012 to include unsigned extends.

Comment thread winch/codegen/src/codegen/mod.rs Outdated
Ok(())
}

pub(crate) fn atomic_rmw(
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Suggested change
pub(crate) fn atomic_rmw(
pub(crate) fn emit_atomic_rmw(

Comment thread winch/codegen/src/codegen/mod.rs Outdated
extend: Option<ExtendKind>,
) -> Result<()> {
let operand = self.context.pop_to_reg(self.masm, None).unwrap();
if let Some(addr) = self.emit_compute_heap_address(arg, size)? {
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Just a note that this will require a rebase once #9987 lands and use emit_compute_heap_address_align_checked

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@saulecabrera I'll do all the rebases once #9987 is in

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@saulecabrera rebase is done. I have also added a check to ensure that only valid extends are passed to emit_atomic_rmw

Comment thread winch/codegen/src/isa/x64/masm.rs Outdated
Comment on lines +1303 to +1310
// It is only necessary to zero-extend when the operand is less than 32bits.
// x64 automatically zero-extend 32bits to 64bit.
Some(
extend @ (ExtendKind::I32Extend8S
| ExtendKind::I64Extend8S
| ExtendKind::I64Extend16S
| ExtendKind::I32Extend16S),
) => {
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I believe the check here needs updating? The code is emitting a zero extend but matching against a signed extend? Also I believe that to: (i) reduce duplication and (ii) avoid affecting compile time performance, we can entirely remove this check, since Cranelift's emission layer already takes care of it https://github.com/bytecodealliance/wasmtime/blob/main/cranelift/codegen/src/isa/x64/inst/emit.rs#L973.

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good catch i'll remove it

@saulecabrera saulecabrera added this pull request to the merge queue Jan 15, 2025
Merged via the queue into bytecodealliance:main with commit 0a4dcc4 Jan 15, 2025
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