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1. riscv-gpu riscv-gpu Public

   Research workspace for building a RISC-V based GPU architecture with systolic-array matrix-multiply accelerators, avoiding custom ISA extensions while exploring standard RISC-V Vector extension fea…

   Verilog 3

2. tppe-lif-multineuron tppe-lif-multineuron Public

   Hardware TPPE + multi-neuron LIF spiking neural network accelerator

   Verilog 1

3. EchoCore EchoCore Public

   FPGA-based parallelism demonstrating true parallel execution of 16-QAM wireless communication and portable ultrasound point-of-care diagnostic systems on a single BeagleV Fire board using Verilog.

   HTML

4. LoAs LoAs Public

   RTL implementation of LoAS - a low-latency inference accelerator for dual-sparse spiking neural networks using fully temporal-parallel dataflow.

   Verilog

5. synapse32 synapse32 Public

   Forked from SRA-VJTI/synapse32

   An inhouse RISC-V 32-bits CPU

   Python

6. VeriGPU VeriGPU Public

   Forked from hughperkins/VeriGPU

   OpenSource GPU, in Verilog, loosely based on RISC-V ISA

   SystemVerilog