Ryzen 8000 series ODT/DS/Power Down Mode incorrect read back in ZenTimings

[gupsterg]

Hi Ivan,

Thank you for great application. On Ryzen 8000 series ODT/DS/Power Down Mode is incorrectly displayed in ZT, I have tried several betas and v1.35, all have this issue. I have used with motherboards ASUS ROG Strix B650E-I Gaming and ASUS Crosshair X870E Apex. I have attached a screen shot and debug file. Any other information you need from setup let me know. I have lower memory clock screen shots as well, Ryzen Master will show changed values.

8700F_Apex_1605_Debug_Report_29270399.9422249.txt

Done donation in past, will again, as wish to support continued development of application.

[gupsterg]

ZT 1824 beta is also not correct read back.

ZT_1824_Debug_Report_29279966.4633989.txt

Power Down Mode is not also read back correctly.

UEFI defaults

UEFI defaults with Power Down Enabled [Disabled]

[gupsterg]

ZT v1.36.1848 maybe working on 8000 series, will continue to test with differing settings.

[irusanov]

The voltages are still not correct, but it seems the impedances might be fixed now.

[gupsterg]

Checking fully stock, ODT/DS correct again, thank you. Just sent small donation, will again soon :) .

Debug_Report_29310578.5575385_Stock.txt

VDDIO is shown as MEM VPP.

MEM VDDQ is showing MEM VPP.

VDDQ is shown as VDD.

Debug_Report_29310595.2567326_VDD_VDDQ.txt

ZT is showing correct set VSOC, as CPU is not in SOC OC mode RM is showing actual SOC voltage not set.

ProcDqDs values on 8000 series.

Placed all DS/ODT/RTT images in this imgur album.

[gupsterg]

Just tried v1.36.1853.

Debug_Report_29318000.023101.txt

No rush, appreciate the previous fixes for 8000 series.

[irusanov]

You can test this build when you have time: https://drive.google.com/file/d/1GEW71-HRP-lvWayQGqf1nFEIQ0j0IIAD/view?usp=sharing

Thanks for providing debug reports - they help tremendously as I don't have a Phoenix to test myself.

BTW, do you know what VMISC is set to?

[gupsterg]

I appreciate this 👍 , just sent another small donation.

Above was VMISC manually set to 0.800. Just in case I am mistaken I have done fresh set of tests and included UEFI settings dump.

Stock_setting.txt

Stock Debug_Report_29318288.3189698.txt

Next I loaded a profile where VMISC is manually set to stock value of 0.750V, I purposefully set differing VDD/VDDQ/VDDIO values, "high power mode" is not on.

88C40_Check_setting.txt

88C40_Check_Debug_Report_29318304.6560106.txt

This profile VMISC is manually set as 0.800V, profile uses "high power mode".

L2_96C44_Check_setting.txt

L2_96C44_Debug_Report_29318311.7084453.txt

ZT 1853 debug 2 caught mismatched tPHYRDL.

The quirk that has existed on Ryzen since 1000 series, where [Auto] tRDWR is mismatched between channel is picked up.

When you added AOD table to sys info that was great update! this new layout for sys info is fantastic!

[irusanov]

Hey, I looked at the new debug logs and the offsets seem to match, so I don't really know what is wrong.
Would you be able to try with the latest build? Maybe I've bundled the wrong core dll in the previous one.

https://drive.google.com/file/d/1UQS39cCS036R016LE2fRb80vAXRf4qej/view?usp=drive_link

If that does not work either, then I'm clearly missing something, but I can't find what atm.

[gupsterg]

Hi Ivan,

I appreciate your efforts, I have sent another small donation.

Here are the results 😎 .

Profile in use.

1715_TGX_94C44_v1.0_setting.txt

Other then VMISC of 0.8 being not read back and ProcDqDs being 34 when it's 30, all is good, thank you very much!

I then adjusted VDD/VDDQ/VDDIO and again correct readback!

You have nailed it! in a few days I will trial this new version on B650E-I with 8000 series CPU, will let you know if there is an issue.