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Tenet Tracer#1205

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xwings merged 2 commits intoqilingframework:devfrom
EtchProject:dev
Aug 10, 2022
Merged

Tenet Tracer#1205
xwings merged 2 commits intoqilingframework:devfrom
EtchProject:dev

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@EtchProject
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@EtchProject EtchProject commented Aug 9, 2022

Checklist

Which kind of PR do you create?

  • This PR introduces a new function/api for Qiling Framework.

This pull request adds a tracer for IDAPro's Tenet plugin in the extensions. The code structure is based completely off of the coverage extension using the context manager, allowing other tracing formats to be easily added in the future.

trace

Tenet trace format

Currently supports:

  • arm
  • arm64 (Tenet only supports up to 32 registers, so only up to X29 could be added)
  • x86
  • x64

Coding convention?

  • The new code conforms to Qiling Framework naming convention.
  • The imports are arranged properly.
  • Essential comments are added.
  • The reference of the new code is pointed out.

Extra tests?

  • No extra tests are needed for this PR.
  • I have added enough tests for this PR.
  • Tests will be added after some discussion and review.

Changelog?

  • This PR doesn't need to update Changelog.
  • Changelog will be updated after some proper review.
  • Changelog has been updated in my PR.

Target branch?

  • The target branch is dev branch.

One last thing


@chinggg
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chinggg commented Aug 9, 2022

Thanks! It seems to be a different tracer compared with the existing trace extension made by @elicn

@EtchProject
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Thanks! It seems to be a different tracer compared with the existing trace extension made by @elicn

No problem, figured I'd share the code I had to make anyways. Yeah that one is for viewing the straight disassembly trace out of the box. This one is loaded into IDA's Tenet so you can see how it ran through the decompiled binary, what basic blocks it took, etc..

@xwings
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xwings commented Aug 10, 2022

Nice work! Welcome to Qiling!

@xwings xwings merged commit 0a84e9a into qilingframework:dev Aug 10, 2022
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Thanks for the great contribution!
I haven't got the chance to review it on time, but here are my belated comments anyway - for your reference. Some are petty, but some are not (:

def __init__(self):
super().__init__()

@property
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Aggregating property on top of staticmethod doesn't work as a static property anymore.
See: https://stackoverflow.com/questions/58871322/property-with-staticmethod-in-python-3 (see references on top)

universally usable by different tracers
"""

arm_registers = {
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These registers mappings are [somewhat] a duplication of the arch classes registers mappings.
Can we re-use the existing ones to create these and avoid code duplication? (with some necessary modifications, of course)

}

def __init__(self, arch):
if isinstance(arch, arm.QlArchARM):
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Wouldn't a dictionaty-based selection [by arch.type] look better then multiple elifs..?

@@ -0,0 +1,103 @@
# This code structure is copied and modified from the coverage extension

import qiling
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Better do from qiling import Qiling.
If this is only for type annotations, then it's would be best to put it under if TYPE_CHECKING to reduce unnecesary runtime depedencies.


def _add_delta(self):
# Cover glitch cases where nothing changed
if self.current_delta != []:
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petty: Could omit the != [] part to make it look cleaner.



@staticmethod
def mem_access_callback(ql, access, address, size, value, self):
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Type annotations (where possible) could be great to keep the code readable and maintainable.

# Since we are reading memory, we just read it ourselves
access_type = "mr"
value = ql.mem.read(address, size)
delta = f"{access_type}={hex(address)}:{value.hex()}"
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petty: Use f'{address:#x}' intead of hex(address)

elif access == UC_MEM_WRITE:
# Hook is before it's written, so we have to use the "value"
access_type = "mw"
if ql.arch.endian == QL_ENDIAN.EL:
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petty: Use ternary operation when an if-else construct asigns a value to the same variable.

endian = 'little'
else:
endian = 'big'
if value < 0:
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petty: Could be just sign = (value < 0)

def dump_trace(self, trace_file: str):
with open(trace_file, "w") as trace:
# Write out each delta on a separate line
for delta in self.deltas:
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petty: Alternatively, trace.write('\n'.join(self.deltas) + '\n') could be faster and cleaner

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5 participants