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[ROCm] Keep GLM-5.2 on MRV1 and disable default breakable cudagraph - #53155

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[ROCm] Keep GLM-5.2 on MRV1 and disable default breakable cudagraph#53155
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@Rohan138 Rohan138 commented Aug 20, 2026

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[ROCm] Keep GLM-5.2 on MRV1 and disable default breakable cudagraph

Purpose

#52861 routed the DSA models to the V2 model runner (MRV2) and breakable CUDA
graphs. On ROCm it excluded DeepseekV32ForCausalLM / DeepseekV4ForCausalLM
from MRV2 (the TODO(rocm) notes these are "unsupported by MRV2 or slower with
MRV2 on AMD GPUs") but missed GlmMoeDsaForCausalLM. GLM-5.2 (both FP8 and
MXFP4) thus became the only DSA model defaulting to MRV2 + breakable cudagraph on
ROCm, which regresses decode latency on gfx950 (MI355X) by ~30–37% TPOT at
batch 1 in nightly perf-eval.

This PR, ROCm-only:

  • adds GlmMoeDsaForCausalLM to the MRV2 exclusion so GLM-5.2 stays on the
    compiled MRV1 path like the other DSA models;
  • stops defaulting any architecture to breakable CUDA graphs on ROCm, where it
    currently regresses performance. Opt-in via VLLM_USE_BREAKABLE_CUDAGRAPH=1
    is unchanged.

No effect on non-ROCm platforms.

Not a duplicate

gh pr list --repo vllm-project/vllm --state open --search "52861 in:body" and a
search for the GLM/ROCm model-runner area returned no open PR addressing this;
the only related open PR (#41834) is NVIDIA SM12x DeepSeek-V4 enablement.

Perf results

GLM-5.2-MXFP4, gfx950 (MI355X), TP8, --load-format dummy, in/out 1024,
vllm bench serve --dataset-name random --max-concurrency 1 --num-prompts 10 --ignore-eos (warmup pass discarded), median TPOT:

build Median TPOT
good nightly (5a4c8d9, pre-#52861-in-range) 13.47 ms
bad nightly (d626108) 17.74 ms (+31.7%)
bad, VLLM_USE_BREAKABLE_CUDAGRAPH=0 only (still MRV2) 16.52 ms
bad + this PR (MRV1 + no default breakable) 13.46 ms (matches good baseline)

Decomposition: MRV2 accounts for ~3.0 ms of the ~4.3 ms regression and breakable
cudagraph for ~1.2 ms, so both changes are needed to fully recover; disabling
breakable alone (env workaround) leaves ~23% on the table.

Testing

  • Perf: commands and numbers above; the Using V2 Model Runner /
    Breakable CUDA graph enabled startup logs are absent with this PR.
  • Unit: tests/test_config.py covers the ROCm MRV2 / breakable defaults; the
    submitter should run pytest tests/test_config.py -k "rocm or dsa or breakable"
    in a built env (not runnable in the perf container used here).

AI assistance

This change was prepared with AI assistance (Claude) and reviewed by the
submitter.

vllm-project#52861 routed the DSA models to the V2 model runner (MRV2) and breakable
CUDA graphs, excluding DeepseekV32/DeepseekV4 from MRV2 on ROCm
("unsupported by MRV2 or slower with MRV2 on AMD GPUs") but missing
GlmMoeDsaForCausalLM. GLM-5.2 (FP8 and MXFP4) thus became the only DSA
model defaulting to MRV2 + breakable cudagraph on ROCm, regressing decode
latency on gfx950 (~30-37% TPOT at batch 1).

Two ROCm-only changes:
- Add GlmMoeDsaForCausalLM to the MRV2 exclusion so GLM-5.2 stays on the
  compiled MRV1 path like the other DSA models.
- Stop defaulting any architecture to breakable CUDA graphs on ROCm,
  where it currently regresses performance. Opt-in via
  VLLM_USE_BREAKABLE_CUDAGRAPH=1 is unchanged.

Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>

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This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

@mergify mergify Bot added glm nvidia rocm Related to AMD ROCm labels Aug 20, 2026
@github-project-automation github-project-automation Bot moved this to Todo in AMD Aug 20, 2026
@Rohan138

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cc @tjtanaa @dllehr-amd

@github-project-automation github-project-automation Bot moved this to Ready in NVIDIA Aug 24, 2026
@Rohan138 Rohan138 added the ready ONLY add when PR is ready to merge/full CI is needed label Aug 24, 2026
@AndreasKaratzas

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/ci run

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@Rohan138, CI is now available for this PR.

  • /ci run starts upstream CI; /amd-ci run starts AMD CI only.
  • /ci retry retries failed jobs in the CI build for the current PR head. If the current head has no CI build, it starts a new CI build for the current head containing only jobs that failed in the latest earlier CI build for this PR.
  • /amd-ci retry retries failed jobs in AMD CI for the current PR head. Use /amd-ci run when the current head has no AMD CI build.
  • /ci cancel cancels scheduled or running CI builds for this PR branch; /amd-ci cancel does the same for AMD CI only.

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✅ Triggered Buildkite CI #85387 for commit 4004208aafba.

Rohan138 and others added 2 commits August 25, 2026 17:45
…able

This PR keeps GlmMoeDsaForCausalLM on the compiled MRV1 path and disables
breakable cudagraphs by default on ROCm. Update the config tests to match:
- GLM-5.2 no longer defaults to breakable cudagraph on ROCm
  (test_dsa_breakable_cudagraph_platform_default: GlmMoeDsa/is_rocm=True now
  expects False).
- GLM-5.2 is excluded from both the V2 model runner and breakable cudagraph
  default sets on ROCm (extend test_rocm_keeps_compiled_deepseek_defaults).

Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
@mawong-amd

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Should revisit the perf numbers here after #53712, and maybe also let DSV4 go back on MRV2

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/ci run

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/amd-ci run

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✅ Triggered Buildkite CI #85730 for commit ee0063441df8.

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✅ Triggered Buildkite AMD CI #12389 for commit ee0063441df8.

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