riscv64: Fix select.i64+icmp.i128 lowering#6317
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This looks exactly right, thank you!
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👋 Hey,
This fixes #6312. We were accidentally selecting an optimized lowering when the icmp was i128bit.
gen_select_reglowers the comparison, but only looking at the bottom registers since it works withReg's and notValueRegs.I think this bug was also in part introduced by a rule that we have (in the RISC-V backend) that auto converts
ValueRegsintoRegsilently.